1. Field of the Invention
The present invention relates to data reading and data writing in FIFO memories and more particularly to writing data in nearly full FIFO memories.
2. Related Prior Art
Typical FIFO buffer memories are made up of an array of memory cells with enough rows and columns to support the width and depth of FIFO needed. Rows are defined as being accessed by a wordline, columns are defined as being accessed by column select circuitry. Typically the column pointers are incremented until the end of the row and then reset to the first location at the same time the row pointer is incremented to the next location. In this description, a read or write pointer will be considered to be the location being accessed by both the row pointer and the column pointer. Boundary flags, Full and Empty, control whether or not the FIFO can be written to or read from when the FIFO is full of data and when the FIFO is empty of data, respectively. When writing to the memory array, the write pointer is incremented until the writes are complete or the Full flag inhibits further writes. If the write pointer reaches the end, or bottom, of the array and the Full flag is not preventing more writes from occurring, the write pointer simply wraps around and writes the cells that have already been read out with new data. Although this is a very efficient use of the memory array, allowing the write pointer and read pointer to operate in a ring, there are two conditions at the boundaries that require additional circuitry to insure proper operation.
Bubbleback conditions exist in FIFO's when the FIFO is operating at or near the Full boundary. At the Empty boundary there is a similar condition called fallthrough. Both these conditions look very similar to each other and cause a distinction to be made and consequent action taken in order for the FIFO to function correctly.
Bubbleback in a FIFO is the situation when the FIFO is operating at or near the Full boundary, and the write pointer has "bubblebacked" or wrapped around to be on the same row of the memory array as the read pointer. This bubbleback condition is very similar to the fallthrough condition or when the FIFO is at or near the Empty boundary, the read and write pointers are on the same row and the data needs to "fallthrough" the FIFO as fast as possible. When the FIFO is operating in either of these conditions the read and write pointer are on the same row. However, in the fallthrough condition the write pointer is ahead of the read pointer and the data must be written through the FIFO and the memory cell, or "fallthrough" the FIFO, while in the bubbleback condition the write pointer is behind the read pointer and the data that is contained in the cells ahead of the read pointer must not be disturbed.
The above mentioned distinction between the fallthrough and bubbleback conditions cause designers to provide several safety precautions. In a first precaution, circuits have been designed to precharge the write bitlines to a high level before turning on the write wordline. This is done so that in the bubbleback condition the memory cells ahead if the read pointer in the same row are not disturbed with invalid data that may have been left on the write bitlines. This precaution requires extra circuitry to be designed around the write wordline activation circuitry to precharge the write bitlines AND consumes more active ICC due to the write bitline precharge, which can be eliminated with the invention.
In a second precaution, circuit designers were required to use a memory cell design that is stable when both read and write wordlines were active. This precaution requires a larger memory cell.
In a third precaution, much complex circuitry was designed and simulated for functionality in case the fallthrough circuitry was activated during an actual bubbleback condition. This had to be designed for because of the decode techniques used to determine if the read and write wordlines were equal. This required more extensive design schedules.
During bubbleback, as illustrated in FIG. 1, the write pointer is behind the read pointer but the wordlines are actually equal. At this point the data in memory cells 6 and 7 have not been read and circuitry has to be designed to insure that they are not inadvertently written, either through leftover write bitline data, cell instability, or fallthrough circuitry inadvertently being activated.
In older FIFO's, the architecture used to handle the fallthrough and bubbleback conditions was different. To improve the fallthrough timing the write bitlines were shorted to the tbus/tbusb whenever the write and read pointers were on the same row. In a bubbleback condition this is unnecessary. The control signal that enables this shorting was derived from extensive logic that could distinguish between the conditions when the FIFO is close to being full or close to being empty.
The main disadvantage of the old method is the fact that it involves extensive logic to derive this function that determines whether to short the write bitlines to the tbus/tbusb when the read and write pointers are pointing to the same row. For bubbleback situations, this condition necessitated the precharging of the write bitlines between writes that could otherwise cause the memory cell to be overwritten. The timing of the column selects and the shorter signals were made more critical. In some previous designs, this led to critical race conditions.